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Tutorial 01 Build the Zynq Hardware Platform

The first step in creating a design for MicroZed/PicoZed is to create the Zynq Hardware Platform in Vivado.

Tutorial 02 First Application - Hello World

After creating the hardware platform, the next step is to import that hardware platform into SDK, create a BSP, create an application, and then run it on the board. This tutorial includes the exported hardware platform from Tutorial 01. For those only interested in the software flow for Zynq, it is appropriate to start with this tutorial.

Tutorial 03 Test Applications

After Hello World is working, you can move on to more advanced applications to test the memory and all the peripherals on MicroZed/PicoZed.

Tutorial 04 FSBL and Boot from QSPI and SD Card

In this tutorial, we will create the FSBL, and then use it to create a boot image. The boot image will be stored on QSPI and microSD Card, and instructions are given for booting from each memory.

Tutorial 05 Echo Server

This tutorial demonstrates how to use the lwIP library to add networking capability to an embedded system.

Tutorial 06 PS SPI PMOD

This tutorial demonstrates how to use the PS SPI Contoller to connect to a MAX31855 PMOD.

Tutorial 07 PL SPI Controller

This tutorial demonstrates how to use the PL AXI Quad SPI Contoller to connect to a MAX31723 PMOD.

Tutorial 08 PS I2C PMOD

This tutorial demonstrates how to use the PS I2C Controller to connect to a MAX44000 PMOD.

Tutorial 09 PL I2C PMOD

This tutorial demonstrates how to use the PL I2C Controller to connect to a MAX44000 PMOD.

Tutorial 01-09 Solutions

Zipped archives of the Vivado hardware platform project and the SDK Applications workspace.

Wind River® Pulsar™ Linux OS

Wind River® Pulsar™ Linux is a small, high-performance, secure, and manageable Linux distribution designed to simplify and speed your embedded and Internet of Things (IoT) development projects. Best of all, it is available at no additional cost on the selected Avnet hardware boards and developer boards.

Transceiver Clock Programming Reference Design

The IDT Clock Programming Reference Design provides engineers with a set of tools which allows you to configure and program the IDT based transceiver clock.

Application Note on Booting PicoZed Using QSPI and eMMC

FMC-HDMI-CAM + PYTHON-1300-C Reference Design Tutorial

IP Cores are provided for the FMC-HDMI-CAM module’s video interfaces (HDMI input, HDMI output), as well as the PYTHON-1300-C camera receiver.  The tutorials instruct the user how to build a design with Vivado Design Suite (IP Integrator and SDK). Required hardware includes: ZedBoard or MicroZed 7020 SOM + FMC Carrier Card or PicoZed 7030 SOM + PicoZed FMC Carrier V2, FMC-HDMI-CAM module, and optionally the PYTHON-1300-C camera module.

 

FMC-HDMI-CAM + PYTHON-1300-C Vivado HLS Reference Design

The Vivado HLS Reference Design provides a feature rich framework for the development of video applications on the Xilinx Zynq-7000 SoC.

The design is supported by Petalinux, including the linux drivers for the following video pipelines : HDMI output (display), co-processing (sobel), HDMI input, PYTHON-1300-C camera input.  Required hardware includes : ZedBoard or PicoZed 7030 SOM + PicoZed FMC Carrier V2, FMC-HDMI-CAM FMC module, and optionally the PYTHON-1300-C camera module.

FMC-HDMI-CAM + PYTHON-1300-C SDSoC platform

The SDSoC platform provides a feature rich framework for the development of video applications on the Xilinx Zynq-7000 SoC.

The design is supported by Petalinux, including the linux drivers for the following video pipelines : HDMI output (display), co-processing (sobel), HDMI input, PYTHON-1300-C camera input.  Required hardware includes : ZedBoard or PicoZed 7030 SOM + PicoZed FMC Carrier V2, FMC-HDMI-CAM FMC module, and optionally the PYTHON-1300-C camera module.

PCIe End Point Reference Design

This reference design demonstrates how to build a PCIe End Point System.

PetaLinux Board Support Packages

Compressed PetaLinux BSPs for Avnet Zynq system platforms.

PCIe PIO Demo

This reference design demonstrates how to use the Xilinx PCIe endpoint IP core in PIO mode (Gen 2x1). Device Driver and GUI app are provided to interact with PCIe hardware. Software can control onboard LEDs and monitor button status.

IBERT Design

IBERT Design implemented and tested on the Avnet Zynq PicoZed + PicoZed FMC Carrier Card.