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Training and Videos

Learn how to create your own ZedBoard designs or see what others have done with ZedBoard by viewing our library of on-line trainings and videos. If you have a video that you would like to share, complete the on-line video request form for further instructions.

Vivado Zynq SpeedWay Workshops

The Xilinx Software Development Kit (SDK) offers everything necessary to make Xilinx Zynq®-7000 All Programmable SoC software application development easy. This class covers these capabilities, including BSP creation, built-in drivers, example C code, interrupts, debugging, flash programming, and where to get more help.

This class demonstrates the hardware and software flows for creating your first Xilinx Zynq®-7000 All Programmable SoC design. Through a series of instructor presentations (based on 2013.3) and hands-on labs ( 2015.2 and 2016.2), hardware and firmware engineers will learn all the required steps for creating a Zynq-7000 All Programmable SoC design on either ZedBoard™ or MicroZed™.

This intermediate-level course provides embedded systems developers with experience in creating an embedded Linux operating system on a Xilinx Zynq®-7000 All Programmable SoC. Based on the PetaLinux Software Development Kit (SDK), the course offers students hands-on experience in building the environment and booting the system using a basic Zynq-7000 All Programmable SoC design.

System-on-Chip designs offer the unique advantage of providing custom built accelerators to increase system performance. This intermediate-level course introduces attendees to the design flow required in identifying software bottlenecks and creating custom hardware accelerators in the Programmable Logic (PL) portion of the Xilinx Zynq®-7000 All Programmable SoC.

This course explores various ARM® processor application debug techniques on the Xilinx Zynq®-7000 All Programmable SoC based MicroZed and ZedBoard development platforms using Xilinx SDK and ARM DS-5. The accompanying lab-based tutorial series begins with the most basic tool configuration and board connection.

Zynq Design Seminars

This seminar introduces students to the Xilinx Smarter Vision offering, featuring the Zynq®-7000 All Programmable SoC, complemented with Vivado, a robust development environment consisting of IP Integrator and Vivado HLS (High-Level Synthesis), Open CV libraries, SmartCORE™ IP and video development kits.

This course introduces wireless communication system design on the new Avnet Zynq®-7000 All Programmable SoC / AD9361 Software-Defined Radio Evaluation Kit featuring Analog Devices AD9361 single-chip RF agile transceiver. An IEEE 802.11 receiver example will demonstrate system-level simulation using MATLAB® and Simulink® modeling and code generation tools from MathWorks.

This seminar bridges the gap between systems engineering and hardware design by introducing an automated tool flow using Simulink® modeling for C and HDL code generation targeting the Xilinx Zynq®-7000 All Programmable SoC.  Learn how algorithm iterations can be quickly prototyped on hardware directly from Simulink and deployed into production using the Xilinx Vivado® Design Suite.  An example

Training Archives

This class demonstrates the techniques and tools used to create a basic Zynq®-7000 All Programmable SoC design. Through a series of instructor presentations and hands-on labs, hardware and firmware developers will learn the required steps for creating a complete Zynq-

This course explores the Linux operating system running on the Xilinx Zynq®-7000 All Programmable SoC. Starting with a pre-built hardware platform, attendees will build an embedded Linux system from the beginning. An application and device driver will be developed to interface to a custom hardware peripheral. The Linux operating system and basic driver development concepts will be explained.

This course combines the high-speed analog signal chain from RF to baseband with FPGA-based digital signal processing for wireless communications. Topics include the high-speed analog signal chain, direct conversion radio architecture, the high-speed data converter interface and FPGA-based digital signal processing for software defined radio.


Get a quick introduction to the UltraZed-EG SOM and Starter Kit

Go in-depth and discover why using the UltraZed-EG SOM is a huge benefit in reducing your design cycle

An example of what you can expect out-of-the-box with the UltraZed Starter Kit.

Linux application development using the Helix App Cloud

Day 1 PM Lab: QPSK Receiver with Radio-in-the-Loop 

Learn more about the Avnet PicoZed SDR2 (ZC7035 + AD9361), and quickly stream samples for "Radio-in-the-Loop". A FM radio signal will be captured on the PicoZed SDR2, and transmitted to Simulink, decoded and heard via the host audio card.

Learn more about the Avnet PicoZed SDR2 (ZC7035 + AD9361), and the AD-PZSDR2400TDD-EB RF personality card. This card includes a 500mW output, and a +10dB Bypassable LNA, and a Tx/Rx switch, to be used in many Time Division Duplex Applications.

Learn more about the Avnet PicoZed SDR2 (ZC7035 + AD9361), the Analog Devices AD9361 RF Transicever, and the associated software that comes with the platform.

Wind River® Pulsar™ Linux is a small, high-performance, secure, and manageable Linux distribution designed to simplify and speed your embedded and Internet of Things (IoT) development projects. Best of all, it is available at no additional cost on the selected Avnet hardware boards and developer boards.


Other Training Resources